Resume for Dipl.-Ing. Andreas Schmidt
Dipl.-Ing. Andreas Schmidt (MSEE) 

San Jose, CA 95128 USA 
Cell phone:               ++1-408-768-1088
Home office phone:  ++1-408-244-5723

Design / ASIC / FPGA / Hardware / Systems / CAD Engineer / Manager / Consultant
in an innovative, industry leading company

  • Experience with VHDL- / Verilog- synthesis / simulation / ASIC designtools since 1994 
  • Gate level simulation experience since 1992 
  • Experience with XILINX FPGA technology and tools since 1989
  • Analog, Digital & Mixed - circuit design experience since 1984
  • Experience with high speed serial connections (links) for inter chip communcation and distributed parallel processing technology since 1991
  • Double Data Rate (DDR) design experience since 1992
  • Computer / system administrator experience since 1983 (Apple, SUN, PC) 

Special skills & highlights
  • ability to write highly portable, parameterizable, modular and scalable code in Verilog and VHDL to allow easy portability, reusability and maintenance
  • ASIC to FPGA and FPGA to ASIC migration experience
  • strong team building, facilitation and mentoring skills with the ability to work with cross functional teams and to jump in the gap where it is needed
  • german engineering education and precision together with strong work ethics
  • strong project management  and analytical problem solving skills


October 2004 - present:                                       
Founder / Principal consultant
  ASIC.CC, San Jose, CA, USA                                                         

  • architect of stream processing system on system and chip level
  • realtime audio/video over ethernet system design and consulting
  • serial high speed connections (links) for inter chip and system communication
  • quality and efficiency management including CVS support
  • design, implementation, simulation and debugging services for Xilinx FPGA designs
  • VHDL to Verilog and Verilog to VHDL code conversion
  • ASIC to FPGA and FPGA to ASIC migration support
  • team building and facilitation support for cross functional design teams
  • CAD/EDA tool support, license administration, configuration and consulting
  • concept, design and implementation of generic IP and design libraries (VHDL/Verilog2001) for cross platform designs
  • third-party code (VHDL/Verilog2001) design review, analysis, debug and correction
  • design consistency checks and management
  • lab debug support (TDR, transmission lines, signal integrity, chipscope)


March 2004 - Januar 2005:                                       
Senior Design Engineer   CloudShield Technologies, Sunnyvale, CA, USA                                  

  • specification, design, implementation, simulation and debugging of multiple FPGA (Xilinx Virtex II Pro/ProX)
      designs for their flagship Network Packet Processing / Network security product CS2000
      which were successful shipped without the necessity of bug fixes for the first General Public Availibility Release
      (Gigabit Ethernet, PCI (32bit/66MHz), bus interface to Intel IXP 2800 NPU, I2C, SONET OC48 framer, interchip communication (2.5 Gigabit) using Xilinx Rocket-IO transceiver on  board level
       and on system level via backplane, SONET OC48 Overhead processing (at line rate with low latency), dynamic (re-) configuration of FPGAs via software)
  • written testbenches / implementation code using Verilog2001 and simulation/implementation scripts
  • written automatic lab test environment to facilitate board bring-up using PERL (RedHat Enterprise Linux 3.0)
  • debugging and correction of  third party code (Verilog) with insufficient and contradicting documentation available
  • board bring-up and lab debugging in close interaction with firmware and board designers
  • CAD/EDA tool support, license administration / configuration and consulting
  • tools used: ModelSim SE, Synplify Pro,  Mentor Precision Synthesis, Xilinx Foundation tool flow, Synopsys VirSim/VCS, HyperLynx,  HSPICE


December 2001 - Januar 2004:                                       
Senior ASIC Engineer   GIBSON Labs Technology Group, Sunnyvale, CA, USA 

(a Research and Development Division of GIBSON Guitar, Nashville, TN, USA)
  • architecture, design and implementation of the digital part of a mixed signal ASIC, implementing the GIBSON MaGIC protocol in hardware (packet processing of realtime audio/video data at the MAC layer and above at 100 MBit fullduplex wirespeed, interfacing to offchip 24bit codecs) for professional audio/video applications (studio/concert/broadcast mixing hardware)
  • inhouse ASIC / semiconductor technology / FPGA  / PCB layout / signal integrity consulting
  • CAD / EDA tool support, license administration, system administration and support
  • circuit board debugging / bring up of  MaGIC platform development boards (optimizing of PLL parameters, stability tests)
  • daily report to the CEO of GIBSON GUITAR, Nashville
  • optimizing an array of six magnetic micro transducers (Output voltage, SNR, frequency response, channel separation) using Finite Element Method Magnetics (FEMM) and SPICE (hexagonal magnetic pickup for the GIBSON MaGIC digital guitar)
  • tools used: ALDEC Active-HDL with code coverage, Synplicity Synplify Pro,  Xilinx Foundation tool flow,  FEMM, TopSPICE, Audio Precision audio analyzer



Sep 2000 - January 2002:                             
Senior FPGA Engineer
Blue Iguana Networks (Nuvation spin-off), Sunnyvale, CA, USA
Technical Lead

Nuvation Labs Corporation, San Jose, CA, USA
  • concept and implementation of the BI Logic engine core 
  • (packet processing at the MAC and above layers at 100 Mbit wirespeed)  (VHDL, Teamlead) 
  • system architecture and development of the BI technology on the target side (remote administration/reconfiguration of FPGAs and systems via a validated, encrypted WAN connection with local fall back)
  • development of future BI technology (patent contribution / coauthoring)
  • design, implementation and integration of a Voice-over-IP design (bidirectional 100MBit Ethernet T1/E1 bridge) for an optical network device (Verilog, Teamlead)
  • real time video data processing / compression (VHDL, Teamlead)
  • mentoring, team leading, inhouse education and consulting 
  • CAD / EDA tool support, license administration, system administration and support
tools used: ALDEC Active-HDL, ModelSim, Synplicity Synplify Pro,  Synopsys FPGA compiler, Xilinx Foundation tool flow


Mar 1994 - Aug 2000:                                                                     

Entrepreneur /  Consultant

Andreas Schmidt ASIC-Design, Technical Consulting, Hard- & Software, Bochum, Germany
  • Project work concerning digital circuit / system design (using Xilinx tools, ALDEC Active-(V)HDL), Protel, Synopsys, Synplicity, Mentor tools) (VHDL, Verilog, mixed)
  • computer solutions for spezialized enviroments (medical technology, NMR data processing) 
  • Authorized SUN-VAR, Apple-, Microsoft-, Microsoft education-dealer
  • Quality and efficiency management for the whole design process
  • Systemadministration of heterogenous networks (SUN/Apple/WinNT-Platforms)
  • Technical Consulting concerning Networking, Computer solutions, System design, FPGA, ASIC
  • Technical Project Management 

Assistant to Systemadmistrator (1 year)
Teaching Assistant: IC-design II design course
(Digital circuits) (3 years)


  • Administration of SunOS 4.1.3, Solaris 2.4, ULTRIX, Linux, MicroVMS 
  • Programming in SunOS-, Solaris-, ULTRIX-enviroment 
  • Installing and configuring of development systems (Cadence, Synopsys, Xilinx, etc.)
  • Xilinx FPGA, Xilinx tools, Synopsys tools, SunOS 4.1.3, SUN SPARC 10/20 
  • Mietec CMOS standardcells(1.2µm), Cadence EDGE, ULTRIX, DECstation5000
  • MMI CMOS-Gate-Arrays, Silvar-Lisco SL2000, MicroVMS, MicroVAXII

Developer of Digital circuits / systems

NEUROTECH GmbH, Oberhausen, Germany


available on request or  look on the reference page


by keywords

  FPGA, ASIC, Xilinx, VHDL, Verilog, Pascal,  Modula2, Ada, C, SUN, Solaris,Apple, Windows NT, system administration, PCB layout, signal integrity, Microsoft, TCP/IP, framer, system design, verification, synthesis, simulation, RTL, Synopsys, Cadence, Mentor, Aldec, ModelSim, Synplicity, Exemplar, Active-HDL, CAD, EDA, FlexLM, licensing, SunOS, ULTRIX, Linux, VMS, CMOS, standardcells, gate arrays, Silvar-Lisco, XACT, PDF, Acrobat, Adobe, FrameMaker, Protel, ORCAD, HTML, XML, GhostScript, PHP, csh, cshell, bourneshell, kornshell, SoC, digital design, LAN, WAN, gateway, switch, router, VoIP, packet processing, DDR, SRAM interface, DDR RAM interface, Transputer, INMOS, Viewlogic, WorkView, Dash FutureNet, Superconductor, german, mentoring, patent, consulting, Dipl.-Ing., MSEE, systemadmistrator, network administrator, wirespeed, project management, Nuvation, BlueIguana, adaptive computing, DSP, digital filter, ATM, SONET, SDH, DLL, clock recovery, logic design, ASIC design, heterogenous networks, gate level, circuit design, Hell, Linotype, Heidelberg, reprographic, scanner, recorder, graphic processing, picture processing,  medical technology, optical network, Globetrotter, video processing, T1, E1, speech processing, sound processing, VLSI, HDL, Vera, timing analysis, design flow, PMI, PMP, tool configuration, SNR, THD, SPICE, frequency response, design flow administration, testbenches, TCL/TK, object-oriented design, OOHD, multi-million gates, methodology, hierachical, modular, symmetrical, locality, place, route, P&R, physical layout, floor planning, memory compiler, timing driven, logic synthesis, physical verification, DRC, LVS, schematic, logic simulation, EDIF, SDF, SMES, Atmel, prototype, DFT, BIST, BILBO, LFSR, scan path, signature analysis, synchronous design, scripting, scripts, shell scripts, MAC, OSI model, IEEE, audio, VAR, behavioral, model, emulation,  MMI, Mietec, GIBSON, GUITAR, MaGIC, mixed signal, codec, realtime audio, jitter, supervision, management, PLL, bass, guitar electronicpickup, magnetic pickup, music electronic, transducer, sensors, FEMM, Finite Element Method Magnetics TopSPICE,  OC48,


Audio Engineering Society, IEEE, Project Management Institute (PMI)

VISA status / 



US:   'greencard' (Permanent Alien Resident Card  [Eligible to work for any employer in the US])

EU:  german citizen    (working permit for the whole European Union)




printable PDF-version printable PDF-version for recruiter


This resume (contents, layout, etc.) is copyrighted by Andreas Schmidt for ASIC.CC! All rights reserved!